by SlipperyDuck » Tue Aug 31, 2010 2:07 pm
TESTING INFO BOX FUNTIONALITY
Code: Select all
[info] = > 300px width, right float, 250px min height, #dadada border
You can use this variantacions [info width=xxx] , [info height=xxx] , [info float=xxx] , [info border=xxx]
Width : must be a number, (Box width)
float : must be left, right or none
border : must be color code like (#000000) or color name (black) (box border color)
height : must be number (Box height)
EXAMPLE: [info width=100 float=right height=200 border=#ff0000][/info]
[info width=100 float=right height=200 border=#ff0000] WOW, so that worked
[/info]
Hardware background
x86 processors, since the 80286, included a similar capability implemented at the segment level. However, current operating systems implementing the flat memory model cannot use this capability. There was no 'Executable' flag in x86 page table entry (page descriptor). Therefore, AMD introduced NX, a mechanism that can control execution per page rather than per whole segment.
The page-level mechanism has been around for years in various other processor architectures such as DEC's (now HP's) VAX (perhaps the first) and Alpha, Sun's SPARC, and IBM's System/370-XA, System/390, z/Architecture and PowerPC. Intel implemented a similar feature in its Itanium (Merced) processor—having IA-64 architecture—in 2001, but did not bring it to the more popular x86 processor families (Pentium, Celeron, Xeon, etc). In the x86 architecture it was implemented by AMD, as NX bit, for use by its AMD64 line of processors, such as the Athlon 64 and Opteron. The term NX bit seems to have now become commonly used to generically describe similar technologies in other processors[citation needed].
After AMD's decision to include this functionality in its AMD64 instruction set, Intel implemented a similar feature in x86 processors beginning with the Pentium 4 processors based on later iterations of the Prescott core.
The NX bit specifically refers to bit number 63 (i.e. the most significant bit) of a 64-bit entry in the page table. If this bit is set to 0, then code can be executed from that page; if set to 1, code cannot be executed from that page, and anything residing there is assumed to be data. Also note that it is used only with Physical Address Extension (PAE) page table format, because the x86's original 32-bit page table format has no bit 63 and therefore no bit to disable/enable execution.
TESTING INFO BOX FUNTIONALITY
[code]
[info] = > 300px width, right float, 250px min height, #dadada border
You can use this variantacions [info width=xxx] , [info height=xxx] , [info float=xxx] , [info border=xxx]
Width : must be a number, (Box width)
float : must be left, right or none
border : must be color code like (#000000) or color name (black) (box border color)
height : must be number (Box height)
EXAMPLE: [info width=100 float=right height=200 border=#ff0000][/info]
[/code]
[info width=100 float=right height=200 border=#ff0000] WOW, so that worked
[img]http://www.grrr.co.za/images/madhippy.gif[/img][/info]
Hardware background
x86 processors, since the 80286, included a similar capability implemented at the segment level. However, current operating systems implementing the flat memory model cannot use this capability. There was no 'Executable' flag in x86 page table entry (page descriptor). Therefore, AMD introduced NX, a mechanism that can control execution per page rather than per whole segment.
The page-level mechanism has been around for years in various other processor architectures such as DEC's (now HP's) VAX (perhaps the first) and Alpha, Sun's SPARC, and IBM's System/370-XA, System/390, z/Architecture and PowerPC. Intel implemented a similar feature in its Itanium (Merced) processor—having IA-64 architecture—in 2001, but did not bring it to the more popular x86 processor families (Pentium, Celeron, Xeon, etc). In the x86 architecture it was implemented by AMD, as NX bit, for use by its AMD64 line of processors, such as the Athlon 64 and Opteron. The term NX bit seems to have now become commonly used to generically describe similar technologies in other processors[citation needed].
After AMD's decision to include this functionality in its AMD64 instruction set, Intel implemented a similar feature in x86 processors beginning with the Pentium 4 processors based on later iterations of the Prescott core.
The NX bit specifically refers to bit number 63 (i.e. the most significant bit) of a 64-bit entry in the page table. If this bit is set to 0, then code can be executed from that page; if set to 1, code cannot be executed from that page, and anything residing there is assumed to be data. Also note that it is used only with Physical Address Extension (PAE) page table format, because the x86's original 32-bit page table format has no bit 63 and therefore no bit to disable/enable execution.